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memtest86 怎么查看正反面坏位 memtest86是什么( 三 )


Memory chips consist of a large array of tightly packed memory cells, one for each bit of data. The vast majority of the intermittent failures are a result of interaction between these memory cells. Often writing a memory cell can cause one of the adjacent cells to be written with the same data. An effective memory test should attempt to test for this condition. Therefore, an ideal strategy for testing memory would be the following:
It should be obvious that this strategy requires an exact knowledge of how the memory cells are laid out on the chip.
In addition there is a never ending number of possible chip layouts for different chip types and manufacturers making this strategy impractical. However, there are testing algorithms that can approximate this ideal.
Memtest86 uses two algorithms that provide a reasonable approximation of the ideal test strategyabove.
解决相邻cell互相影响的问题 。
The first of these strategies is called moving inversions. The moving inversion test works as follows:
This algorithm is a good approximation of an ideal memory test but there are somelimitations . Most high density chips today store data 4 to 16 bits wide. With chips that are more than one bit wide it is impossible to selectively read or write just one bit. This means that we cannot guarantee that all adjacent cells have been tested for interaction. In this case the best we can do is to use some patterns to insure that all adjacent cells have at least been written with all possible one and zero combinations.
It can also be seen that caching, buffering and out of order execution will interfere with the moving inversions algorithm and make less effective. It is possible to turn off cache but the memory buffering in new high performance chips can not be disabled. To address this limitation a new algorithm I call Modulo-X was created. This algorithm is not affected by cache or buffering. The algorithm works as follows:
This algorithm accomplishes nearly the same level of adjacency testing as moving inversions but is not affected by caching or buffering.
Since separate write passes (1a, 1b) and the read pass (1c) are done for all of memory we can be assured that all of the buffers and cache have been flushed between passes. The selection of 20 as the stride size was somewhat arbitrary.
Larger strides may be more effective but would take longer to execute. The choice of 20 seemed to be a reasonable compromise between speed and thoroughness.
Memtest86 executes a series of numbered test sections to check for errors.
These test sections consist of a combination oftest algorithm, data pattern and cache setting .
Theexecution orderfor these tests were arranged so that errors will be detected as rapidly as possible.
Tests 8, 9, 10 and 11 are very long running extended tests and are only executed whenextended testingis selected.
The extended tests have a low probability of finding errors that were missed by the default tests.
A description of each of the test sections follows:
Tests all address bits in all memory banks by using a walking ones address pattern.
This test uses the moving inversions algorithm with patterns of only ones and zeros.
Cache is enabled even though it interferes to some degree with the test algorithm. With cache enabled this test does not take long and should quickly find all "hard" errors and some more subtle errors. This test is only a quick check.
Each address is written with its own address and then is checked for consistency.
In theory previous tests should have caught any memory addressing problems. This test should catch any addressing errors thatsomehowwere not previously detected.
This is the same as test one but uses a 8 bit wide pattern of "walking" ones and zeros. This test willbetter detect subtle errors in "wide" memory chips.
A total of 20 data patterns are used.
This is a variation of the moving inversions algorithm that shifts the data pattern left one bit for each successive address.
The starting bit position is shifted left for each pass. To use all possible data patterns32 passesare required.
This test is effective in detecting** data sensitive** errors in "wide" memory chips.
This test stresses memory by using block move (movsl) instructions and is based on Robert Redelmeier's burnBX test.
Memory is initialized with shifting patterns that are inverted every 8 bytes. Then 4mb blocks of memory are moved around using the movsl instruction.
After the moves are completed the data patterns are checked. Because the data is checked only after the memory moves are completed it is not possible to know where the error occurred.
The addresses reported are only for where the bad pattern was found. Since the moves are constrained to a 8mb segment of memory the failing address will always be less than 8mb away from the reported address. Errors from this test are not used to calculate BadRAM patterns.


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